Forming self-aligned conductive lines for resistive random access memories
US9196530B1 · kind B1 · utility
2Cited by
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19Claims
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Key dates
| Filing date | May 19, 2010 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Jan 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Resistive random access memory elements, such as phase change memory elements, may be defined using a plurality of parallel conductive lines over a stack of layers, at least one of which includes a resistive switching material. The stack may be etched using the conductive lines as a mask. As a result, memory elements may be self-aligned to the conductive lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.