Semiconductor device having buried channel array and method of manufacturing the same
US9196729B2 · kind B2 · utility
2Cited by
3References
11Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 16, 2014 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Apr 16, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
Abstract
A semiconductor device and a method of fabricating a semiconductor device, the device including an active region on a substrate, the active region being defined by a field region; gate trenches in the active region of the substrate; gate structures respectively formed in the gate trenches; and at least one carrier barrier layer in the substrate and under the gate trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.