Wafer examination device and wafer examination method
US9201094B2 · kind B2 · utility
1Cited by
6References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2013 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | Feb 26, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A wafer examination device includes a probe, a fusion section and a measurement section. The probe is made of a metal which reacts with silicon carbide to produce silicide. The fusion section fuses the probe to a silicon carbide wafer as an examined object. The measurement section measures an electrical property of the silicon carbide wafer through the fused probe.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.