Method for manufacturing silicon—oxide—nitride—oxide—silicon (SONOS) non-volatile memory cell

US9202701B1 · kind B1 · utility

Assignee

• UNITED MICROELECTRONICS CORP. · TW

Inventors

• Kun-I Chou · Tainan, TW
• Chi-Cheng Huang
• Yu-Chun Chang · Hsinchu, TW
• Ling-Hsiu Chou · Tainan, TW
• Tseng-Fang Dai · Tainan, TW
• Jheng-Jie Huang · Yuchi, TW
• Ping-Chia Shih · Hsinchu, TW

Key dates

• Filing date: Dec 17, 2014
• Grant date: Dec 1, 2015
• Expiry date: Dec 17, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/69

Abstract

A method for manufacturing a silicon-oxide-nitride-oxide-silicon non-volatile memory cell includes following steps. An implant region is formed in a substrate. A first oxide layer, a nitride layer, and a second oxide layer are formed and stacked on the substrate. A density of the second oxide layer is higher than a density of the first oxide layer. A first photoresist pattern is formed on the second oxide layer and corresponding to the implant region. A first wet etching process is then performed to form an oxide hard mask. A second wet etching process is performed to remove the nitride layer exposed by the oxide hard mask to form a nitride pattern. A cleaning process is then performed to remove the oxide hard mask and the first oxide layer exposed by the nitride pattern, and a gate oxide layer is then formed on the nitride pattern.