Semiconductor device and method for manufacturing thereof
US9202809B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2014 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | Feb 16, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided including a substrate and a plurality of gate stacks. The gate stack includes a dielectric layer disposed on the substrate, a first capping layer disposed on the dielectric layer, a second capping layer disposed on the first capping layer, and a gate electrode layer covering the second capping layer. The first capping layer having a roughened surface may enhance the formation of the second capping layer. The second capping layer has a bottom portion and a sidewall portion, and the thickness of the bottom portion is formed to be greater than the thickness of the sidewall portion, so that the dielectric property of the second capping layer may be significantly improved. Further, a method for manufacturing the semiconductor device also provides herein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.