Well resistors and polysilicon resistors
US9202859B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 27, 2014 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | May 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/209
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit containing a well resistor has STI field oxide and resistor dummy active areas in the well resistor. STI trenches are etched and filled with trench fill dielectric material. The trench fill dielectric material is removed from over the active areas by a CMP process, leaving STI field oxide in the STI trenches. Subsequently, dopants are implanted into a substrate in the well resistor area to form the well resistor. An integrated circuit containing a polysilicon resistor has STI field oxide and resistor dummy active areas in an area for the polysilicon resistor. A layer of polysilicon is formed and planarized by a CMP process. A polysilicon etch mask is formed over the CMP-planarized polysilicon layer to define the polysilicon resistor. A polysilicon etch process removes polysilicon in areas exposed by the polysilicon etch mask, leaving the polysilicon resistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.