Patent · US Active

Mechanism to speed-up multithreaded execution by register file write port reallocation

US9207995B2 · kind B2 · utility

27Cited by
4References
12Claims
0Family size

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Inventors

Key dates

Filing dateJun 27, 2011
Grant dateDec 8, 2015
Priority date
Expiry dateSep 14, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/3891
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Various systems and processes may be used to speed up multi-threaded execution. In certain implementations, a system and process may include the ability to write results of a first group of execution units associated with a first register file into the first register file using a first write port of the first register file and write results of a second group of execution units associated with a second register file into the second register file using a first write port of the second register file. The system, apparatus, and process may also include the ability to connect, in a shared register file mode, results of the second group of execution units to a second write port of the first register file and connect, in a split register file mode, results of a part of the first group of execution units to the second write port of the first register file.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.