Phase interpolator
US9208130B1 · kind B1 · utility
5Cited by
1References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 16, 2012 |
| Grant date | Dec 8, 2015 |
| Priority date | — |
| Expiry date | Aug 18, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0025
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase interpolator is described. The phase interpolator may comprise a first plurality of digital-to-analog converters coupled to receive a first phase of a clock signal; a second plurality of digital-to-analog converters coupled to receive a second phase of the clock signal; and a third plurality of digital-to-analog converters coupled to both the first phase of the clock signal and the second phase of the clock; wherein each digital-to-analog converter is configurable to receive either the first phase of the clock signal or the second phase of the clock signal. A method of implementing a phase interpolator is also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.