Methods for fabricating integrated circuits including selectively forming and removing fin structures
US9209037B2 · kind B2 · utility
4Cited by
2References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2014 |
| Grant date | Dec 8, 2015 |
| Priority date | — |
| Expiry date | Mar 4, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes forming fin structures in a selected area of a semiconductor substrate. The method includes covering the fin structures and the semiconductor substrate with a mask and forming a trench in the mask to define no more than two exposed fin structures in the selected area. Further, the method includes removing the exposed fin structures to provide the selected area with a desired number of fin structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.