Power transistor

US9209248B2 · kind B2 · utility

Assignee

• Infineon Technologies Dresden GmbH & Co. KG · DE

Inventor

• Stefan Tegen · Dresden, DE

Key dates

• Filing date: Aug 7, 2013
• Grant date: Dec 8, 2015
• Expiry date: Nov 15, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/513

Abstract

A power transistor includes a number of transistor cells. Each transistor cell includes a source region, a drain region, a body region and a gate electrode. Each source region is arranged in a first semiconductor fin of a semiconductor body. Each drain region is at least partially arranged in a second semiconductor fin of the semiconductor body. The second semiconductor fin is spaced from the first semiconductor fin in a first horizontal direction of the semiconductor body. Each gate electrode is arranged in a trench adjacent the first semiconductor fin, is adjacent the body region, and is dielectrically insulated from the body region by a gate dielectric. Each of the first and second semiconductor fins has a width in the first horizontal direction and a length in a second horizontal direction, wherein the length is larger than the width.