Integrated device having MOSFET cell array embedded with barrier Schottky diode
US9209293B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2013 |
| Grant date | Dec 8, 2015 |
| Priority date | — |
| Expiry date | May 6, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
Abstract
Provided is an integrated device having a MOSFET cell array embedded with a junction barrier Schottky (JBS) diode. The integrated device comprises a plurality of areas, each of which includes a plurality of MOS transistor cells and at least one JBS diode. Any two adjacent MOS transistor cells are separated by a separating line. A first MOS transistor cell and a second MOS transistor cell are adjacent in a first direction and separated by a first separating line, and the first transistor cell and a third MOS transistor cell are adjacent in a second direction and separated by a second separating line. The JBS diode is disposed at an intersection region between the first separating line and the second separating line. The JBS diode is connected in anti-parallel to the first, second and third MOS transistor cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.