Enhanced low inductance interconnections between electronic and opto-electronic integrated circuits
US9209509B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Mar 18, 2014 |
| Grant date | Dec 8, 2015 |
| Priority date | — |
| Expiry date | Mar 18, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10121
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A configuration for routing electrical signals between a conventional electronic integrated circuit (IC) and an opto-electronic subassembly is formed as an array of signal paths carrying oppositely-signed signals on adjacent paths to lower the inductance associated with the connection between the IC and the opto-electronic subassembly. The array of signal paths can take the form of an array of wirebonds between the IC and the subassembly, an array of conductive traces formed on the opto-electronic subassembly, or both.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.