Patent · US Active

Power semiconductor module with asymmetrical lead spacing

US9210818B2 · kind B2 · utility

0Cited by

13References

20Claims

0Family size

Assignee

IXYS Semiconductor GmbH · DE

Inventors

Olaf Zschieschang · Vaterstetten, DE
Andreas Laschek-Enders · Bensheim, DE

Key dates

Filing date	Mar 24, 2015
Grant date	Dec 8, 2015
Priority date	—
Expiry date	Mar 24, 2035

Classification

Technology area (CPC H)Electricity
CPC primaryH05K2201/10166
WIPO fieldAudio-visual technology
WIPO sectorElectrical engineering

Abstract

A power semiconductor has power terminals arranged in a row at one side of the housing, with control terminals arranged in a row at the other side of the housing. The spacing between adjacent power terminals is greater than the spacing between adjacent control terminals.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.