Patent · US Active

Bundled memory and manufacture method for a bundled memory with an external input/output bus

US9214448B2 · kind B2 · utility

2Cited by
1References
4Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 25, 2014
Grant dateDec 15, 2015
Priority date
Expiry dateJun 25, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B12/50
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A bundled memory includes a substrate, a first memory die, a second memory die, a scribe line, and an electrical connection. The first memory die has a first input/output bus, and the second memory die has a second input/output bus, where the first memory die and the second memory die are formed over the substrate. The scribe line is formed between the first memory die and the second memory die. The electrical connection is formed over the scribe line for electrically connecting to the first input/output bus and the second input/output bus, where the electrical connection is electrically connected to an external input/output bus, where a size of the external input/output bus of the bundled memory is larger than or equal to a size of the first input/output bus and a size of the second input/output bus.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.