Semiconductor device with integrated electrostatic discharge (ESD) clamp
US9214542B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2013 |
| Grant date | Dec 15, 2015 |
| Priority date | — |
| Expiry date | Dec 26, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/813
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device includes a substrate, a body region in the substrate and having a first conductivity type, source and drain regions in the substrate, having a second conductivity type, and spaced from one another to define a conduction path that passes through the body region, a doped isolating region in the substrate, having the second conductivity type, and configured to surround a device area in which the conduction path is disposed, an isolation contact region in the substrate, having the second conductivity type, and electrically coupled to the doped isolating region to define a collector region of a bipolar transistor, and first and second contact regions within the body region, having the first and second conductivity types, respectively, and configured to define a base contact region and an emitter region of the bipolar transistor, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.