Patent · US Active

Test system for semiconductor array

US9218756B2 · kind B2 · utility

0Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 5, 2013
Grant dateDec 22, 2015
Priority date
Expiry dateJun 13, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/31924
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

In accordance with an embodiment, an integrated circuit includes a plurality of devices on the integrated circuit. Each device includes a driving circuit, an individual contact pad coupled to a first terminal of the driving circuit, and a switch having a first terminal coupled to the first terminal of the driving circuit. Also, the integrated circuit includes a shared contact pad coupled to a second terminal of each switch of the plurality of devices. The integrated circuit also includes a controller coupled to each switch of the plurality of devices, where the controller is configured to selectively control each switch to couple each driving circuit to the shared contact pad.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.