Non-volatile memory (NVM) cell
US9219167B2 · kind B2 · utility
0Cited by
2References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2013 |
| Grant date | Dec 22, 2015 |
| Priority date | — |
| Expiry date | Dec 19, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a flash memory cell includes forming a first hard mask and a second hard mask on a substrate. A select gate is formed as a spacer around the first hard mask. A charge storage layer is formed over the first and second hard masks and the select gate. A control gate is formed as a spacer around the second hard mask. A recess in the control gate is filled with a dielectric material. The recess is formed between a curved sidewall of the control gate and a sidewall of the charge storage layer directly adjacent the curved sidewall of the control gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.