Patent · US Active

Analog-to-digital converter with expected value nonlinearity calibration

US9219493B1 · kind B1 · utility

9Cited by
7References
20Claims
0Family size

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Key dates

Filing dateNov 21, 2014
Grant dateDec 22, 2015
Priority date
Expiry dateNov 21, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M3/468
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A system includes an analog-to-digital converter (ADC) for converting an analog input signal to a digital signal output and a nonlinearity corrector for correcting nonlinear error in the digital signal output to produce a corrected digital signal output. A source of the nonlinear error is associated with the ADC, wherein an analog calibration signal is introduced to the source of the nonlinear error during conversion of the analog calibration signal to a digital calibration output having the nonlinear error. After conversion of the analog calibration signal to the digital calibration output, a calibration circuit calculates expected values of correlation sums in response to the digital calibration output and determines correction coefficients using the expected values of the correlation sums. The calibration circuit provides correction data based upon the correction coefficients to the nonlinearity corrector.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.