Functional path failure monitor

US9222971B2 · kind B2 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Xiaoxiao Wang · Tangxia, CN
• Orman G. Shofner · Leander, US
• Dat T. Tran · Round Rock, US
• LeRoy Winemberg · Austin, US
• Ender Yilmaz · Austin, US

Key dates

• Filing date: Oct 30, 2013
• Grant date: Dec 29, 2015
• Expiry date: Oct 30, 2033

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/31725
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

System circuitry includes a logic circuit having an input and an output that is a functional element of the system circuitry. Pattern application circuitry is coupled to the input of the logic circuit and provides an input pattern to the input of the logic circuit. The input pattern has a valid signature based upon a comparison of the input and the output of the logic circuit when the logic circuit is functioning properly. A logic comparator is coupled to the input and the output of the logic circuit and generates pulses in response to the input pattern. A counter is coupled to the logic comparator that obtains a count of the pulses generated by the logic comparator in response to the input pattern. A signature comparator is coupled to the counter and generates a warning signal if the valid signature is different from the count.