Method, system, and computer program product for checking, verifying, or testing a multi-fabric electronic design spanning across multiple design fabrics
US9223915B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2014 |
| Grant date | Dec 29, 2015 |
| Priority date | — |
| Expiry date | Oct 1, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2113/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are various techniques that check, verify, or test multi-fabric designs by receiving a request for checking correctness of a multi-fabric design across at least a first design fabric and a second design fabric. A request for action is transmitted from a first EDA tool session to a second EDA tool session. Connectivity information of second design data in the second design fabric is identified by the second EDA tool session in response to the request for action from the first EDA tool session. These various techniques then check the correctness of the multi-fabric design in the first design fabric by using at least the connectivity information of the second design data. A symbolic representation may be used to represent design data in an EDA tool session to which the design data are not native.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.