Pre-charge sample-and-hold circuit and method for pre-charging a sample-and-hold circuit
US9224499B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 7, 2014 |
| Grant date | Dec 29, 2015 |
| Priority date | — |
| Expiry date | Mar 30, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/468
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A precharge sample-and-hold circuit is provided that has an input terminal, a reference voltage terminal and an output terminal. The circuit has a sampling capacitance coupled between the input terminal and the reference voltage terminal. The sampling capacitance is configured to provide the sample voltage when the sample-and-hold circuit is in a holding mode. The circuit also has a cancellation capacitance. An analog/digital converter is provided that uses the precharge sample-and-hold circuit. A method to operate the precharge sample-and-hold circuit is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.