Package-on-package assembly with wire bonds to encapsulation surface
US9224717B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2014 |
| Grant date | Dec 29, 2015 |
| Priority date | — |
| Expiry date | Dec 9, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a microelectronic package includes forming a dielectric encapsulation layer on an in-process unit having a substrate having a first surface and a second surface remote therefrom. A microelectronic element is mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface, at least some of which are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the bases and define an edge surface extending away between the base and the end surface. The encapsulation layer is formed to at least partially cover the first surface and portions of the wire bonds with unencapsulated portions of the wire bonds being defined by at least one of the end surface or a portion of the edge surface that is uncovered thereby.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.