Method and apparatus for buffering analog information
US9225921B2 · kind B2 · utility
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36Claims
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Key dates
| Filing date | Jun 6, 2013 |
| Grant date | Dec 29, 2015 |
| Priority date | — |
| Expiry date | Dec 19, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/771
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Generally, an integrated circuit, an apparatus and a method for buffering analog information capture first analog information with a capture element and store at least portions of the analog information in a first passive variable resistance memory element coupled to the capture element and in a second passive variable resistance memory element. The portions of the analog information stored in the first passive variable resistance memory element and in the second passive variable resistance memory element may be the same or may be different.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.