Targeted copy of data relocation
US9229644B2 · kind B2 · utility
7Cited by
21References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2013 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | Jul 29, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a nonvolatile memory array that has a binary cache formed of SLC blocks and a main memory formed of MLC blocks, corrupted data along an MLC word line is corrected and relocated, along with any other data along the MLC word line, to binary cache, before it becomes uncorrectable. Subsequent reads of the relocated data directed to binary cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.