Semiconductor wafer composed of silicon and method for producing same
US9230798B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2015 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | May 5, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Monocrystalline silicon semiconductor wafers have a front side and a rear side, and a denuded zone which extends from the front side to the rear side as far as a depth which between a center and an edge of the semiconductor wafer on average is not less than 8 μm and not more than 18 μm, and having a region adjoining the denuded zone having BMDs whose density at a distance of 30 μm from the front side is not less than 2×109 cm−3. The semiconductor wafers are produced by a method comprising providing a substrate wafer of monocrystalline silicon and an RTA treating the substrate wafer, the treatment subdivided into a first thermal treatment of the substrate wafer in an atmosphere consisting of argon and into a second thermal treatment of the substrate wafer in an atmosphere consisting of argon and ammonia.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.