Chase decoding for turbo-product codes (TPC) using error intersections
US9231623B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2014 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | Jun 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/453
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A set of error intersections is determined using at least a first set of error-containing codewords and a second set of error-containing codewords. A first set of bit locations is selected from the set of error intersections using soft information associated with the first set of error-containing codewords. Chase decoding is performed on the first set of error-containing codewords. The set of error intersections is updated, based at least in part on the Chase decoding, to obtain an updated set of error intersections. From the updated set of error intersections, a second set of bit locations is selected using soft information associated with the second set of error-containing codewords. Chase decoding is performed on the second set of error-containing codewords.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.