Adaptive EPWR (enhanced post write read) scheduling
US9235470B2 · kind B2 · utility
5Cited by
3References
20Claims
0Family size
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Key dates
| Filing date | Oct 3, 2013 |
| Grant date | Jan 12, 2016 |
| Priority date | — |
| Expiry date | Jun 6, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0796
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for adaptive enhanced post write reads (EPWRs) is provided. An error rate of a block of solid state memory may be determined. Foldings may be performed more times between two consecutive enhanced post write reads on the block when the determined error rate of the block is a lower value than when the determined error rate is a higher value. The foldings may be performed by folding data into the block of the solid state memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.