Combined output buffer and ESD diode device
US9236372B2 · kind B2 · utility
3Cited by
8References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 29, 2011 |
| Grant date | Jan 12, 2016 |
| Priority date | — |
| Expiry date | Jan 5, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/611
Abstract
An integrated circuit ESD protection circuit (270) is formed with a combination device consisting of a gated diode (271) and an output buffer MOSFET (272) where the body tie fingers of a first conductivity type (307) are formed in the substrate (301, 302) and isolated from the drain regions of a second conductivity type (310) using a plurality of diode poly fingers (231, 232) which are interleaved with a plurality of poly gate fingers (204, 205) forming the output buffer MOSFET (272).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.