Methods of fabricating quantum well field effect transistors having multiple delta doped layers
US9236444B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2013 |
| Grant date | Jan 12, 2016 |
| Priority date | — |
| Expiry date | Jul 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
Abstract
Methods of fabricating quantum well field effect transistors are provided. The methods may include forming a first barrier layer including a first delta doped layer on a quantum well layer and forming a second barrier layer including a second delta doped layer selectively on a portion of the first barrier layer in a first region of the substrate. The methods may also include patterning the first and second barrier layers and the quantum well layer to form a first quantum well channel structure in the first region and patterning the first barrier layer and the quantum well layer to form a second quantum well channel structure in a second region. The methods may further include forming a gate insulating layer on the first and second quantum well channel structures of the substrate and forming a gate electrode layer on the gate insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.