Split write operation for resistive memory cache
US9239788B2 · kind B2 · utility
4Cited by
6References
8Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 24, 2013 |
| Grant date | Jan 19, 2016 |
| Priority date | — |
| Expiry date | Nov 21, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/229
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of reading from and writing to a resistive memory cache includes receiving a write command and dividing the write command into multiple write sub-commands. The method also includes receiving a read command and executing the read command before executing a next write sub-command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.