Systems and methods for preventing unauthorized stack pivoting

US9239801B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Baiju V. Patel · Portland, US
• Xiaoning Li · Santa Clara, US
• H P. ANVIN · San Jose, US
• Asit K. Mallick · Saratoga, US
• Gilbert Neiger · Hillsboro, US
• James B. Crossland · Banks, US
• Toby Opferman · Beaverton, US
• Atul Khare · Portland, US
• Jason W. Brandt · Austin, US
• James S. Coke · Shingle Springs, US
• Brian L. Vajda · Portland, US

Key dates

• Filing date: Jun 5, 2013
• Grant date: Jan 19, 2016
• Expiry date: Dec 19, 2033

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F21/52
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

An example processing system may comprise: a lower stack bound register configured to store a first memory address, the first memory address identifying a lower bound of a memory addressable via a stack segment; an upper stack bound register configured to store a second memory address, the second memory address identifying an upper bound of the memory addressable via the stack segment; and a stack bounds checking logic configured to detect unauthorized stack pivoting, by comparing a memory address being accessed via the stack segment with at least one of the first memory address and the second memory address.