Apparatus and method to reduce power delivery noise for partial writes
US9240250B2 · kind B2 · utility
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2References
25Claims
0Family size
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Inventors
Key dates
| Filing date | Jun 14, 2013 |
| Grant date | Jan 19, 2016 |
| Priority date | — |
| Expiry date | Mar 11, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus, systems, and methods to reduce power delivery noise for partial writes are described. In one embodiment, an apparatus comprises a processor and a memory control logic to insert one or more dummy unit intervals into data in a write operation when a number of state transitions between adjacent unit intervals exceeds a threshold. Other embodiments are also disclosed and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.