Techniques for forming 3D structures
US9240350B2 · kind B2 · utility
1Cited by
3References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 2012 |
| Grant date | Jan 19, 2016 |
| Priority date | — |
| Expiry date | May 31, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A technique for forming 3D structures is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for forming 3D structures. The method may comprise providing a substrate comprising at least two vertically extending fins that are spaced apart from one another to define a trench; depositing a dielectric material in the trench between the at least two vertically extending fins; providing an etch stop layer within the dielectric material, the etch stop layer having a first side and a second opposite side; removing the dielectric material near the first side of the etch stop layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.