Synchronous circuit, method of designing a synchronous circuit, and method of validating a synchronous circuit

US9244123B1 · kind B1 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Thomas Koch · Kleinwallstadt, DE
• Ilhan Hatirnaz · Munich, DE
• Michael Rohleder · Unterschleißheim, DE

Key dates

• Filing date: Nov 25, 2014
• Grant date: Jan 26, 2016
• Expiry date: Nov 25, 2034

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F30/327
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A synchronous circuit comprises a functional circuitry and one or more validation circuits for validating synchronization of the functional circuitry. The functional and the validation circuits are clocked by a clock source. Each validation circuit comprises a clock distribution network, a test signal generator, a capture cell, a test signal path from the test signal generator to the capture cell, and a verification unit. The clock distribution network applies a launch clock signal at the test signal generator and a capture clock signal at the capture cell. The test signal generator produces a bi-level test signal. The test signal path transmits the test signal to the capture cell, which generates a proof sequence by sampling the test signal. The verification unit determines whether the proof sequence is identical to the test sequence.A method of designing a synchronous circuit and method of validating a synchronous circuit are also described.