Semiconductor packages having through electrodes and methods for fabricating the same
US9245771B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2014 |
| Grant date | Jan 26, 2016 |
| Priority date | — |
| Expiry date | Apr 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor packages having through electrodes and methods for fabricating the same are provided. The method may comprise providing a first substrate including a first circuit layer, forming a front mold layer on a front surface of the first substrate, grinding a back surface of the first substrate, forming a first through electrode that penetrates the first substrate to be electrically connected to the first circuit layer, providing a second substrate on the back surface of the first substrate, the second substrate including a second circuit layer that is electrically connected to the first through electrode, forming a back mold layer on the back surface of the first substrate, the back mold layer encapsulating the second substrate, and removing the front mold layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.