High voltage field effect transistors

US9245989B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Han Wui Then · Portland, US
• Robert S. Chau · Beaverton, US
• Benjamin Chu-Kung · Portland, US
• Gilbert Dewey · Beaverton, US
• Jack T. Kavalieros · Portland, US
• Matthew V. Metz · Portland, US
• Niloy Mukherjee · Beaverton, US
• Ravi Pillarisetty · Portland, US
• Marko Radosavljevic · Portland, US

Key dates

• Filing date: Dec 19, 2011
• Grant date: Jan 26, 2016
• Expiry date: May 10, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/8503
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Transistors suitable for high voltage and high frequency operation. A nanowire is disposed vertically or horizontally on a substrate. A longitudinal length of the nanowire is defined into a channel region of a first semiconductor material, a source region electrically coupled with a first end of the channel region, a drain region electrically coupled with a second end of the channel region, and an extrinsic drain region disposed between the channel region and drain region. The extrinsic drain region has a wider bandgap than that of the first semiconductor. A gate stack including a gate conductor and a gate insulator coaxially wraps completely around the channel region, and drain and source contacts similarly coaxially wrap completely around the drain and source regions.