CMOS-compatible gold-free contacts

US9252118B2 · kind B2 · utility

Assignees

• Intel Corporation · US
• The Regents of the University of California · US

Inventors

• Siddharth Jain · Lompoc, US
• John Lowell Bowers · Klamath Falls, US
• Matthew Sysak · Lompoc, US
• John Heck · Berkeley, US
• Ran Feldesh · Gan Yavne, IL
• Richard Jones · San Mateo, US
• Yoel Shetrit · Ramat HaSharon, IL
• Michael Geva · Allentown, US

Key dates

• Filing date: Dec 22, 2011
• Grant date: Feb 2, 2016
• Expiry date: Dec 22, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/201
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor metallurgy includes a ratio of germanium and palladium that provides low contact resistance to both n-type material and p-type material. The metallurgy allows for a contact that does not include gold and is compatible with mass-production CMOS techniques. The ratio of germanium and palladium can be achieved by stacking layers of the materials and annealing the stack, or simultaneously depositing the germanium and palladium on the material where the contact is to be manufactured.