Patent · US Active

Semiconductor chip and semiconductor arrangement

US9252140B2 · kind B2 · utility

3Cited by

3References

16Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Gerhard Zojer · Bad Sankt Leonhard im Lavanttal, AT
Daniel Auer · Traunstein, DE
Gerrit Utz · Wartenberg, DE
Claudia Kabusch · Villach, AT

Key dates

Filing date	Mar 22, 2012
Grant date	Feb 2, 2016
Priority date	—
Expiry date	Nov 24, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/83
WIPO fieldTransport
WIPO sectorMechanical engineering

Abstract

One aspect of the invention relates to a semiconductor chip with a semiconductor body. The semiconductor body has an inner region and a ring-shaped outer region. An electronic structure is monolithically integrated in the inner region and has a controllable first semiconductor component with a first load path and a first control input for controlling the first load path. Further, a ring-shaped second electronic component is monolithically integrated in the outer region and surrounds the inner region. Moreover, the second electronic component has a second load path that is electrically not connected in parallel to the first load path.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.