Method and system for reducing write latency in a data storage system by using a command-push model
US9256384B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2013 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Oct 23, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/38
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storage system is provided that implements a command-push model that reduces latencies. The host system has access to a nonvolatile memory (NVM) device of the memory controller to allow the host system to push commands into a command queue located in the NVM device. The host system completes each IO without the need for intervention from the memory controller, thereby obviating the need for synchronization, or handshaking, between the host system and the memory controller. For write commands, the memory controller does not need to issue a completion interrupt to the host system upon completion of the command because the host system considers the write command completed at the time that the write command is pushed into the queue of the memory controller. The combination of all of these features results in a large reduction in overall latency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.