Semiconductor structure and manufacturing method thereof
US9257337B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2014 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Dec 17, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06541
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device is provided. The method includes: providing a first wafer having a first active surface and a first rear surface opposite to the first active surface, the first wafer comprising a first circuit formed therein; providing a second wafer having a second active surface and a second rear surface opposite to the second active surface, the second wafer comprising a second circuit formed therein; bonding the first active surface of the first wafer with the second active surface of the second wafer so as to electrically connecting the first circuit and the second circuit; thinning the second wafer from the second rear surface; and forming at least a conductive through via in the second wafer, wherein the conductive through via is electrically connected to the first circuit through the second circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.