TSV substrate structure and the stacked assembly thereof
US9257338B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2015 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Feb 6, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The disclosure provides a TSV substrate structure and the stacked assembly of a plurality of the substrate structures, the TSV substrate structure including: a substrate comprising a first surface, a corresponding second surface, and a TSV communicating the first surface with the second surface through the substrate; and a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second surfaces of the substrate, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.