Fin-type field effect transistor and manufacturing method thereof
US9257538B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 30, 2014 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Sep 30, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/797
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A FinFET device includes a gate dielectric layer on a substrate, a fin on the gate dielectric layer having a middle section and source and drain regions at opposite ends, and a gate structure on the middle section of the fin. The FinFET device also includes a trench in a portion of the source and drain regions and a multi-layered epitaxial structure in the trench. The multi-layered epitaxial structure includes a first epitaxial layer in direct contact with the bottom of the trench, a second epitaxial layer on the first epitaxial layer, and a third epitaxial layer on the second epitaxial layer. The first epitaxial layer is a carbon-doped silicon layer having a carbon dopant concentration of less than 4 percent by weight, the second epitaxial layer is a barrier metal layer, and the third epitaxial layer is a metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.