Protective sidewall techniques for RRAM

US9257642B1 · kind B1 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Yao-Wen Chang · Hsinchu, TW
• Jian-Shiou Huang · Fangliao, TW
• Hsing-Lien Lin · Hsinchu, TW
• Cheng-Yuan Tsai · Taipei, TW
• Chia-Shiung Tsai · Jinshanmian, TW

Key dates

• Filing date: Jul 16, 2014
• Grant date: Feb 9, 2016
• Expiry date: Jul 16, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8833

Abstract

Some embodiments relate to a resistive random access memory (RRAM). The RRAM includes a RRAM bottom metal electrode, a variable resistance dielectric layer arranged over the RRAM bottom metal electrode, and a RRAM top metal electrode arranged over the variable resistance dielectric layer. A capping layer is arranged over the RRAM top metal electrode. A lower surface of the capping layer and an upper surface of the RRAM top metal electrode meet at an interface. Protective sidewalls are adjacent to outer sidewalls of the RRAM top metal electrode. The protective sidewalls have upper surfaces at least substantially aligned to the interface at which the upper surface of the RRAM top metal electrode meets the lower surface of the capping layer.