Level shifter utilizing a capacitive isolation barrier
US9257983B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2014 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Oct 30, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L5/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
According to an exemplary implementation, a level shifter includes a low voltage circuit and a high voltage circuit. The low voltage circuit is configured to provide a differential signal to the high voltage circuit through a capacitive isolation barrier. The high voltage circuit is configured to receive the differential signal from the low voltage circuit through the capacitive isolation barrier so as to level shift the differential signal from a first ground of the low voltage circuit to a second ground of the high voltage circuit. The high voltage circuit is further configured to provide a feedback signal to the low voltage circuit through the capacitive isolation barrier. The low voltage circuit can be configured to receive the feedback signal from the low voltage circuit between edges of the differential signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.