Semiconductor device having a strained region
US9263342B2 · kind B2 · utility
11Cited by
4References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2012 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Mar 2, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides devices and methods which provide for strained epitaxial regions. A method of semiconductor fabrication is provided that includes forming a gate structure over a fin of a semiconductor substrate and forming a recess in the fin adjacent the gate structure. A sidewall of the recess is then altered. Exemplary alterations include having an altered profile, treating the sidewall, and forming a layer on the sidewall. An epitaxial region is then grown in the recess. The epitaxial region interfaces the altered sidewall of the recess and is a strained epitaxial region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.