Enhancing barrier in air gap technology
US9263389B2 · kind B2 · utility
3Cited by
5References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 14, 2014 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | May 14, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor structure including a barrier layer between a metal line and an air gap oxide layer. The barrier layer may be formed in-situ or by a thermal annealing process and may prevent diffusion or electrical conduction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.