Package with metal-insulator-metal capacitor and method of manufacturing the same
US9263511B2 · kind B2 · utility
915Cited by
9References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2013 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Feb 11, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19104
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package includes a chip that has a metal-insulator-metal (MIM) capacitor formed in a first polymer layer and a metallic pillar formed on the MIM capacitor. A molding compound surrounds the chip, a second polymer layer is formed on the chip and the molding compound, a third polymer layer is formed on the second polymer layer, an interconnect structure is formed between the second polymer layer and the third polymer layer and electrically coupled to the metallic pillar and the MIM capacitor, and a bump is formed over and electrically coupled to the interconnect structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.