Jui-Pin Hung
138Patents
16h-index
51Co-inventors
85Inventor score
Filing activity: Mar 29, 2006 → Mar 28, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9048222B2 | Method of fabricating interconnect structure for package-on-package devices | Electricity | 971 | Active |
| US9000584B2 | Packaged semiconductor device with a molding compound and a method of forming the same | Electricity | 935 | Active |
| US9263511B2 | Package with metal-insulator-metal capacitor and method of manufacturing the same | Electricity | 915 | Active |
| US9064879B2 | Packaging methods and structures using a die attach film | Electricity | 754 | Active |
| US8877554B2 | Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices | Electricity | 600 | Active |
| US8829676B2 | Interconnect structure for wafer level package | Electricity | 579 | Active |
| US8703542B2 | Wafer-level packaging mechanisms | Electricity | 568 | Active |
| US8785299B2 | Package with a fan-out structure and method of forming the same | Electricity | 563 | Active |
| US9378982B2 | Die package with openings surrounding end-portions of through package vias (TPVs) and package on package (PoP) using the die package | Electricity | 44 | Active |
| US9373527B2 | Chip on package structure and method | Electricity | 43 | Active |
| US8952544B2 | Semiconductor device and manufacturing method thereof | Electricity | 38 | Active |
| US9111914B2 | Fan out package, semiconductor device and manufacturing method thereof | Electricity | 37 | Active |
| US9159678B2 | Semiconductor device and manufacturing method thereof | Electricity | 35 | Active |
| US8779599B2 | Packages including active dies and dummy dies and methods for forming the same | Electricity | 34 | Active |
| US9425121B2 | Integrated fan-out structure with guiding trenches in buffer layer | Electricity | 19 | Active |
| US9460987B2 | Interconnect structure for package-on-package devices and a method of fabricating | Electricity | 19 | Active |
| US9431367B2 | Method of forming a semiconductor package | Electricity | 15 | Active |
| US9368438B2 | Package on package (PoP) bonding structures | Electricity | 13 | Active |
| US10269778B2 | Package on package (PoP) bonding structures | Electricity | 13 | Active |
| US8827695B2 | Wafer's ambiance control | Emerging Cross-Sectional Technologies | 12 | Active |
| US8916972B2 | Adhesion between post-passivation interconnect structure and polymer | Electricity | 12 | Active |
| US9935080B2 | Three-layer Package-on-Package structure and method forming same | Electricity | 12 | Active |
| US9922903B2 | Interconnect structure for package-on-package devices and a method of fabricating | Electricity | 11 | Active |
| US9553000B2 | Interconnect structure for wafer level package | Electricity | 10 | Active |
| US10079225B2 | Die package with openings surrounding end-portions of through package vias (TPVs) and package on package (PoP) using the die package | Electricity | 9 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.