Patent · US Active

Semiconductor integrated circuit

US9263883B2 · kind B2 · utility

2Cited by
1References
6Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 5, 2013
Grant dateFeb 16, 2016
Priority date
Expiry dateJan 16, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D89/911
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

A first power line configured to receive a first voltage, a second power line configured to receive a second voltage which is lower than the first voltage, a first clamping unit configured to be connected to the first power line, a second clamping unit configured to be connected between the first clamping unit and the second power line, and a discharging unit configured to, when an abnormal voltage introduced through the first power line or the second power line is applied, discharge the abnormal voltage by coupling with the first clamping unit or the second clamping unit are included.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.