Low latency data exchange
US9268704B2 · kind B2 · utility
14Cited by
23References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2013 |
| Grant date | Feb 23, 2016 |
| Priority date | — |
| Expiry date | May 30, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a method for exchanging data in a system that includes a main processor in communication with an active memory device is provided. The method includes a processing element in the active memory device receiving an instruction from the main processor and receiving a store request from a thread running on the main processor, the store request specifying a memory address associated with the processing element. The method also includes storing a value provided in the store request in a queue in the processing element and the processing element performing the instruction using the value from the queue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.